JR0230549 System Memory Validation Engineer

JR0230549 System Memory Validation Engineer

Job Description
 

• The Memory and I/O Technologies team is looking for validation engineers to join our memory validation team for an exciting opportunity in Intel Datacenter and AI Group.
  • MIO has an Intel wide charter in memory architecture development, spec definition, and enabling technical collateral spanning technologies from USB to PCIe to DDR.
  • We develop the spec, design and fabricate the test hardware, write the code, and validate the memory on Intel's products.
  • To ensure the highest quality memory for Intel's products, we develop the latest in memory validation methods on a memory tester, at the signal integrity bench, and in the platform.
  • If you have experience in memory validation and want to work with an exciting team on cutting edge memory technologies, we would like to hear from you.

Responsibilities would include but not be limited to the following:

• • Validate DDR memory on Intel's next generation servers and client systems/ Evaluate and resolve platform memory failures using logic analyzer, oscilloscope, and other system or electrical validation tools.
  • Work within Intel workgroups and with customers and suppliers to resolve memory sightings in Intel systems.
  • Collaborate with internal hardware design teams to evaluate signaling of test hardware designs.
  • Create system validation test plans based on DDRx memory design specifications. Debug and resolve memory failures involving complex interaction between system, BIOS, and memory using innovative debug techniques.
  • Design test plans for larger scale deployment of memory testing at system level.

 
Qualifications:

• • BS or MS in CS or EE with at least 5+ of experience in DRAM memories
  • 5 years experience in C/C+ programming, Python, Memory Reference Code (MRC), and/or BIOS
  • 5 years experience in DDR DRAM architecture
  • 5 years experience with logic analyzer, In Target Probe (ITP), and/or oscilloscopes